Title

Symbolic Timing Simulation Using Cluster Scheduling

Date of Original Version

2000

Type

Working Paper

Rights Management

All Rights Reserved

Abstract or Description

We recently introduced symbolic timing simulation (STS) using data-dependent delays as a tool for verifying the timing of fullcustom transistor-level circuit designs, and for the functional verification of delay-dependent logic. While STS leverages efficient symbolic encodings to yield huge gains over conventional simulation methodologies, it still suffers from a problem known as

event multiplication

. We discuss this problem and present an event-list management technique based on event-clusters, and a new simulator which utilizes this technique. Finally, we demonstrate substantial speedups on a wide range of test cases, including exponenti alimprovement on a simple logic chain.