Date of Original Version
All Rights Reserved
Abstract or Description
Energy consumption and design simplicity are paramount concerns in on-chip interconnects for chip multiprocessors. Several proposed and a few implemented many-core on-chip interconnects are mesh or torus-based. These designs offer good scalability. However, most mainstream commercial chip multiprocessors use rings, in which each network node has relatively simpler ring stop logic. Network traffic injected into the ring continues until reaching its destination, so no flow control or buffering is needed, unlike a mesh. This design simplicity is attractive to implementors of small-to-medium-scale CMPs, and at lower core counts, rings can offer competitive performance with lower die area and energy consumption. Unfortunately, rings do not scale as well as meshes to large core counts.
In this paper, we propose a simple hierarchical ring topology and router design, which we call HiRD (Hierarchical Rings with Deflection), to enable better scalability while maintaining the simplicity of existing ring-based designs. Hierarchical ring networks have been proposed before. However, HiRD has two major new contributions. First, unlike past hierarchical ring designs, HiRD requires no in-ring flow control or buffering. Instead, HiRD implements inter-ring transfers using “bridge routers” which use minimal inter-ring buffering and, when the buffer is full, deflect transferring flits so that they circle the ring and try again. Second, we introduce two simple mechanisms which provide an end-to-end delivery guarantee (despite any deflections that occur) without impacting the critical path or latency of the vast majority of network traffic. We rigorously show that our network is deadlock- and livelock-free.
Our evaluations show that HiRD attains equal or better performance at better energy efficiency than a comprehensive set of baseline NoC topologies and router designs, including a previous hierarchical ring design, a conventional 2D mesh, and a single ring. We conclude that HiRD is a compelling design point which allows scalable, efficient performance while retaining the simplicity and appeal of ring-based designs.