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Physically-Aware Diagnostic Resolution Enhancement for Digital Ci.pdf (1.43 MB)

Physically-Aware Diagnostic Resolution Enhancement for Digital Circuits

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posted on 2016-09-01, 00:00 authored by Yang Xue

Diagnosis is the first analysis step for uncovering the root cause of failure for a defective chip. It is a fast and non-destructive approach to preliminarily identify and locate possible defects in a failing chip. Despite many advances in diagnosis techniques, it is often the case, however, that resolution, i.e., the number of locations or candidates reported by diagnosis, exceeds the number of actual failing locations. To address this major challenge, a novel, machine-learning-based resolution improvement methodology named PADRE (Physically-Aware Diagnostic Resolution Enhancement) is described. PADRE uses easily-available tester and simulation data to extract features that uniquely characterize each candidate. PADRE applies machine learning to the features to identify candidates that correspond to the actual failure locations. Through various experiments, PADRE is shown to significantly improve resolution with virtually no negative impact on accuracy. Specifically, in simulation experiments, the number of defects that have perfect resolution is increased by 5x with little degradation of accuracy. An important investigation that typically follows diagnosis is Physical Failure Analysis (PFA), which can also provide information that is helpful for improving diagnosis. PADRE influences PFA within a novel, active learning (AL) based PFA selection approach. An active-learning based PADRE (AL PADRE) selects the most useful defects for PFA in order to improve diagnostic resolution. Experiments show AL PADRE can reach an accuracy of 90% with 60% less PFA, on average, compared to conventional defect selection for PFA. In addition, during the yield learning process, the failing mechanisms that lead to defective chips may change due to perturbations in the fabrication process. It is important for PADRE to perform robustly through the entire yield learning process. Therefore, additional techniques are developed to monitor the effectiveness of PADRE in real time, as well as to update PADRE efficiently and stably to cope with changing failure mechanisms.

History

Date

2016-09-01

Degree Type

  • Dissertation

Department

  • Electrical and Computer Engineering

Degree Name

  • Doctor of Philosophy (PhD)

Advisor(s)

Zhang Ying,Xin Li,Shawn Blanton

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