Date of Award
Dissertation (CMU Access Only)
Doctor of Philosophy (PhD)
Electrical and Computer Engineering
Gary K. Fedder
This thesis explains the design, fabrication and characterization steps of a high dynamic range CMOS-MEMS capacitive accelerometer array and on-chip environmental sensors for bias drift compensation. Inertial navigation under harsh environments requires a high dynamic range accelerometer that can survive and provide continuous readout accuracy through shock events, while having a large dynamic range to capture fine-scale motions. The dynamic range target is set as 156 dB in accordance with navigation standard macro-electromechanical accelerometers, which corresponds to around 1 mG acceleration resolution in 50 kG input range. The small accelerometer cell design ensures shock survivability (e.g. up to 50 kG) by keeping the stress at the anchors below the fracture strength of thin-film oxide. Arraying multiple accelerometer cells in parallel lowers the fundamental thermomechanical noise limit set by the small mass of the individual accelerometer cells. Resonance frequency staggering between accelerometer cells suppresses ring-down oscillations. Parasitic capacitance of the high-impedance transduction signal is important to mitigate; undercut of the underlying silicon substrate and an aluminum etch of the top metal layer, incorporated in the CMOS-MEMS process flow, reduces the parasitic capacitance and improves sensitivity. PTAT temperature sensors, piezoresistive stress sensors and resonator-oscillators integrated across the accelerometer chip provide high-resolution environmental measurements for the compensation of long-term bias and scale factor drift. Simultaneous measurements from the accelerometer and environmental sensors demonstrate the correlation between environmental variations and long-term drift. Finite-element analysis shows that the scale factor stability of the accelerometer can be improved up to 1 ppm given the sensor array’s measurement resolution. The CMOS-MEMS accelerometer system-on-chip is fabricated in a TowerJazz 0.18 μm CMOS process. The post-CMOS MEMS processing steps are tuned to reduce the top metal milling and sidewall polymer deposition. A reactive ion etch recipe is developed for the removal of the top metal in order to reduce the parasitic capacitance and eliminate the risk of metal creep at spring beam anchors, thereby improve the bias stability. The PTAT temperature sensors have 3.1 mV/K measured sensitivity and 7.1 mK resolution with high repeatability. The compensation of the accelerometer readout for temperature variations down to 7.1 mK translates to 2.6 ppm scale factor stability for the accelerometer. The characterization of the stress sensors through the application of normal stress on the device package leads to an uncertainty in the amount of stress transferred to the stress sensors on the chip surface. The maximum measured stress sensitivity is 36.5 pV/Pa, which leads to 24.7 kPa stress resolution and translates to 1.7 ppm scale factor stability for the accelerometer without taking the stress attenuation into account. The measured sensitivity sets a lower bound on the sensitivity of the stress sensors implying that the stress resolution and the corresponding accelerometer scale factor stability is higher in practice. The measured frequency stability of the resonator-oscillator is 0.4 ppm, thereby the resonance frequency based variations of the accelerometer readout can be compensated to reach up to 0.8 ppm scale factor stability. However, the initial drift in the resonance frequency of the oscillators due to dielectric charging requires a long wait-time before these sensors can be used for accelerometer drift compensation. The accelerometer array is demonstrated to have 23.7 mG/√Hz noise floor and 70 mG bias stability. The maximum input acceleration applied on the device is limited to 4 kG by the split Hopkinson bar test setup. Improvement of the setup to transfer acceleration amplitudes up to 50 kG should validate the designed input range of the accelerometer array and lead to 117 dB dynamic range for the current design. The measurement bandwidth is fundamentally set by the 126 kHz resonance frequency of the accelerometer cells and can be further limited by filtering the readout signal to attenuate the transient oscillations faster. The nonlinearity of the accelerometer response is better than 1.2% in ±10 kG input range; however, it gets up to 19.0% in ±50 kG maximum input range. The long term bias drift of the accelerometer is shown to be correlated with the temperature and stress variations. Compensation of the accelerometer readout based on the stress and temperature sensor measurements leads to an observable improvement in the long term drift. However, the bias stability of the accelerometer is limited by excessive flicker noise in the system, which is believed to result from noise folding from higher frequencies. Suppression of the flicker noise in the system should allow for a more detailed study of the effect of environmental variations on the accelerometer readout and evaluation of more elaborate fitting algorithms for model based prediction and compensation of the bias drift to reach the target bias stability and dynamic range.
Guney, Metin G., "High Dynamic Range CMOS-MEMS Capacitive Accelerometer Array with Drift Compensation" (2018). Dissertations. 1155.
Available for download on Tuesday, November 13, 2018