Date of Original Version

4-2002

Type

Conference Proceeding

Published In

Proceedings of 2002 IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), pages 57–66, April, 2002.

Abstract or Description

In this paper we describe a peer-to-peer interface between processor cores and reconfigurable fabrics. The main advantage of the peer-to-peer model is that it greatly expands the scope of application for reconfigurable computing and hence its potential benefits. The primary extension in our model is that "code" on the reconfigurable hardware unit is allowed to invoke routines both on the reconfigurable unit itself and on the fixed logic processor We describe the software constructs and compilation mechanisms needed for such an architecture, including a detailed description of the interface between the two parts of the application.

DOI

10.1109/FPGA.2002.1106661

Share

COinS